HIPPI variable-length packet interfaces were used to connect hosts in the Blanca, Casa, Nectar and Vistanet testbeds, and also for some hosts in Aurora. In addition, a variable-length gigabit token ring, Orbit, was developed by IBM and used in Aurora, and a general-purpose PTM host interface was also developed as part of the Aurora work.
Most of the HIPPI interfaces were provided by computer vendors as part of their supplied equipment during the course of the project. Cray Research provided HIPPI interfaces for the CRAY YMP supercomputer early in the project, and by the end of 1993 commercial HIPPI interfaces were available for most supercomputers and several high-end workstations. Commercially developed HIPPI interfaces were used in the testbeds with Sun and SGI workstations and with the CRAY YMP, C90 and T3D, the TMC CM2 and CM5, the Intel Delta and Paragon, and the MasPar and SGI Challenge supercomputers, and with frame buffer and RAID storage peripherals.
For the DECStation workstations used in the Nectar testbed, HIPPI interfaces were developed for the project as externally connected equipment (Figure 4-12).
Figure 4-12. Nectar Workstation I/O
This was done as part of a more general effort under another contract to develop a device, called the Communication Accelerator Block (CAB), which could provide external I/O support to a wide range of hosts. Specific CAB implementations were developed for both the DECStation and the iWarp (discussed below). The functions of the CAB consist of buffering packets for network transmission and reception, providing TCP protocol checksumming support, and interfacing to the host and the network. The workstation unit is called the wCAB, and interfaces a HIPPI connection to the Turbochannel I/O bus of the DECStation using off-the-shelf hardware components.
Performance of the HIPPI interfaces was strongly dependent on packet length due to the various latency and overhead factors of I/O busses and software. Most of the interfaces operated at or near the full HIPPI rate of 800 Mbps when measured at the internal HIPPI I/O driver interface using a packet size of 65 KBytes. An exception was the wCAB, for which its DMA microcode implementation constrained Turbochannel transfer rates to about 200 Mbps. However, it was believed that the wCAB operation would have been able to achieve full Turbochannel rates had more time been available.
MIT developed a general PTM interface board design, called the FLORB, and implemented it for a DEC workstation using a Turbochannel I/O bus (Figure 4-13).
Figure 4-13. FLORB PTM Interface
Their design consisted of a shared fast SRAM, a single Intel 960 RISC processor, a FIFO at each of the four host and network input and output ports, and a DMA controller. A novel aspect of their design concerns the way in which the processor controls the data bus, allowing data to be flexibly moved between multiple points on the bus in a single instruction cycle, for example from the host input FIFO directly to both the SRAM and the network output FIFO. Throughput rates of approximately 400 Mbps were measured for IP traffic, with the limiting factors found to be Turbochannel I/O bus arbitration and DEC memory contention effects.